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» System-Level Design for FPGAs
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DATE
2003
IEEE
130views Hardware» more  DATE 2003»
15 years 9 months ago
Noise Macromodel for Radio Frequency Integrated Circuits
† Noise performance is a critical analog and RF circuit design constraint, and can impact the selection of the IC system-level architecture. It is therefore imperative that some ...
Yang Xu, Xin Li, Peng Li, Lawrence T. Pileggi
128
Voted
ISSS
1995
IEEE
98views Hardware» more  ISSS 1995»
15 years 8 months ago
On the use of VHDL-based behavioral synthesis for telecom ASIC design
higher levels of abstraction, due to the still increasing design complexities that can be expected in the near future. Behavioral synthesis can play a key role in this prospect, as...
Mark Genoe, Paul Vanoostende, Geert van Wauwe
136
Voted
DATE
2004
IEEE
136views Hardware» more  DATE 2004»
15 years 8 months ago
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems
Recently a lot of multimedia applications are emerging on portable appliances. They require both the flexibility of upgradeable devices (traditionally software based) and a powerf...
Michele Borgatti, Andrea Capello, Umberto Rossi, J...
ACSD
2003
IEEE
159views Hardware» more  ACSD 2003»
15 years 9 months ago
Case Studies of Model Checking for Embedded System Designs
As modern embedded systems become more integrated and complex, it is crucial to be able to represent systems ple levels of abstraction, so that the design space can be effectively...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
SIGMOD
2009
ACM
157views Database» more  SIGMOD 2009»
16 years 4 months ago
FPGA: what's in it for a database?
While there seems to be a general agreement that next years' systems will include many processing cores, it is often overlooked that these systems will also include an increa...
Jens Teubner, René Müller