897 search results - page 106 / 180 » System-Level Design for FPGAs |
108
click to vote
IPPS
2006
IEEE
15 years 10 months ago
2006
IEEE
With rapid advances in VLSI technology, Field Programmable Gate Arrays (FPGAs) are receiving the attention of the Parallel and High Performance Computing community. In this paper,...
134
click to vote
FPL
2005
Springer
15 years 10 months ago
2005
Springer
At Leiden University, we are developing a design methodology that allows for fast mapping of nested-loop applications (e.g. DSP, Imaging, or MultiMedia) written in a subset of Matl...
121
Voted
FPL
1998
Springer
15 years 8 months ago
1998
Springer
In this paper the Peripheral Component Interface PCI is presented as a target/master reconfigurable interface, based on Programmable Logic Devices PLDs (the Field Programmable Gate...
140
click to vote
FCCM
2009
IEEE
15 years 8 months ago
2009
IEEE
This paper proposes a high performance least square solver on FPGAs using the Cholesky decomposition method. Our design can be realized by iteratively adopting a single triangular...
119
click to vote
FPL
2006
Springer
15 years 8 months ago
2006
Springer
This paper presents FPGA implementations of the DES and Triple-DES with improved security against power analysis attacks. The proposed designs use Boolean masking, a previously in...