897 search results - page 115 / 180 » System-Level Design for FPGAs |
145
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CODES
2008
IEEE
15 years 4 months ago
2008
IEEE
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
118
Voted
DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
In recent years, increasing manufacturing density has allowed the development of Multi-Processor Systems-on-Chip (MPSoCs). Application-Specific Instruction Set Processors (ASIPs)...
130
Voted
DATE
2003
IEEE
15 years 10 months ago
2003
IEEE
The ForSyDe methodology has been developed for system level design. Starting with a formal specification model, that captures the functionality of the system at a high abstractio...
135
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ISCAS
2007
IEEE
15 years 11 months ago
2007
IEEE
—Two probabilistic-based models, namely the Ensemble-Dependent Matrix model [1][3] and the Markov Random Field model [2], have been proposed to deal with faults in nanoscale syst...
125
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CODES
2005
IEEE
15 years 10 months ago
2005
IEEE
This paper describes the design of a low-cost, low-power smart imaging core that can be embedded in cameras. The core integrates an ARM 9 processor, a camera interface and two spe...