897 search results - page 128 / 180 » System-Level Design for FPGAs |
157
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APCSAC
2001
IEEE
15 years 8 months ago
2001
IEEE
Traditional reconfigurable computing platforms are designed to be single user and have been acknowledged to be difficult to design applications for. The design tools are still pri...
155
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CASES
2000
ACM
15 years 8 months ago
2000
ACM
This paper introduces the notion of a Flexible Instruction Processor (FIP) for systematic customisation of instruction processor design and implementation. The features of our app...
154
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DAC
2008
ACM
15 years 6 months ago
2008
ACM
Our work addresses protection of hardware IP at the mask level with the goal of preventing unauthorized manufacturing. The proposed protocol based on chip locking and activation i...
125
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FPGA
2008
ACM
15 years 6 months ago
2008
ACM
This paper presents a new technology mapper, WireMap. The mapper uses an edge flow heuristic to improve the routability of a mapped design. The heuristic is applied during the ite...
153
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ERSA
2007
15 years 6 months ago
2007
- Even though state-of-the-art FPGAs present new opportunities in exploring low-cost high-performance architectures for floating-point scientific applications, they also pose serio...