897 search results - page 129 / 180 » System-Level Design for FPGAs |
140
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ERSA
2003
15 years 6 months ago
2003
The availability of SiGe HBT devices has opened a door for Gigahertz FPGAs. However, the large device power consumption limits its scale. In order to solve this problem, a Multipl...
136
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IJCM
2002
15 years 4 months ago
2002
Abstract. The class of systems of uniform recurrence equations (UREs) is closed under unimodular transformations. As a result, every systolic array described by a unimodular mappin...
115
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TVLSI
1998
15 years 4 months ago
1998
— Fault-tolerance is an important system metric for many operating environments, from automotive to space exploration. The conventional technique for improving system reliability...
139
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FCCM
2008
IEEE
15 years 11 months ago
2008
IEEE
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...
175
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CF
2009
ACM
15 years 11 months ago
2009
ACM
In this paper, we compare the architectural perspectives of the Wave Field Synthesis (WFS) 3D-audio algorithm mapped on three different platforms: a General Purpose Processor (GP...