897 search results - page 134 / 180 » System-Level Design for FPGAs |
132
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CHES
2006
Springer
15 years 8 months ago
2006
Springer
A novel portable hardware architecture of the Elliptic Curve Method of factoring, designed and optimized for application in the relation collection step of the Number Field Sieve,...
164
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FPL
2006
Springer
15 years 8 months ago
2006
Springer
Emerging embedded System-on-Chip (SoC) platforms are increasingly becoming multiprocessor architectures. The advances in the FPGA chip technology make the implementation of such a...
158
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SPAA
2000
ACM
15 years 8 months ago
2000
ACM
Modern VLSI processing supports a two-dimensional surface for active devices along with multiple stacked layers of interconnect. With the advent of planarization, the number of la...
133
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FPGA
1995
ACM
15 years 8 months ago
1995
ACM
This paper presents a methodology for production-time testing of (uncustomized) segmented channel eld programmable gate arrays (FPGAs) such as those manufactured by Actel [1]. Th...
121
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ASPDAC
2005
ACM
15 years 6 months ago
2005
ACM
Power has become an increasingly important design constraint for FPGAs in nanometer technologies, and global interconnects should be the focus of FPGA power reduction as they cons...