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» System-Level Design for FPGAs
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73
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ISSS
2002
IEEE
129views Hardware» more  ISSS 2002»
15 years 5 months ago
System-Level Design of IEEE1394 Bus Segment Bridge
Takao Onoye, Yukihiro Nakamura, Atsuhito Shigiya, ...
68
Voted
ASPDAC
2007
ACM
82views Hardware» more  ASPDAC 2007»
15 years 4 months ago
Abstract, Multifaceted Modeling of Embedded Processors for System Level Design
Gunar Schirner, Andreas Gerstlauer, Rainer Dö...
116
Voted
FDL
2004
IEEE
15 years 4 months ago
UML System-Level Analysis and Design of Secure Communication Schemes for Embedded Systems
In this work we develop a secure communication protocol in the context of a Remote Meter Reading (RMR) System. We first analyze existing standards in secure communication (e.g. IP...
Mauro Prevostini, Giuseppe Piscopo, I. Stefanini
125
Voted
EURODAC
1994
IEEE
148views VHDL» more  EURODAC 1994»
15 years 4 months ago
System-Level Modeling and Verification: a Comprehensive Design Methodology
Paolo Camurati, Fulvio Corno, Paolo Prinetto, Cath...