897 search results - page 144 / 180 » System-Level Design for FPGAs |
151
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IEEEARES
2006
IEEE
15 years 10 months ago
2006
IEEE
Distributed hash tables (DHTs) can be used as the basis of a resilient lookup service in unstable environments: local routing tables are updated to reflected changes in the netwo...
215
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CONPAR
1994
15 years 8 months ago
1994
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
138
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JNW
2006
15 years 4 months ago
2006
Distributed hash tables (DHTs) can be used as the basis of a resilient lookup service in unstable environments: local routing tables are updated to reflected changes in the network...
151
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CODES
2006
IEEE
15 years 10 months ago
2006
IEEE
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
153
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CODES
2006
IEEE
15 years 10 months ago
2006
IEEE
Virtual platform (ViP), or ESL (Electronic System Level) simulation model, is one of the most widely renowned system level design techniques. In this paper, we present a case stud...