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ENTCS
2008
106views more  ENTCS 2008»
15 years 4 months ago
Modelling Adaptive Systems in ForSyDe
Emerging architectures such as partially reconfigurable FPGAs provide a huge potential for adaptivity in the area of embedded systems. Since many system functions are only execute...
Ingo Sander, Axel Jantsch
VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
16 years 4 months ago
Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
Banit Agrawal, Timothy Sherwood, Chulho Shin, Simo...
CODES
2004
IEEE
15 years 8 months ago
Analytical models for leakage power estimation of memory array structures
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
DAC
2000
ACM
16 years 5 months ago
Depth optimal incremental mapping for field programmable gate arrays
In this paper, we study the incremental t echnology mapping problem for lookup-table (LUT) based Field Programmable Gate Arrays (FPGAs) under incremental changes. Given a gate-lev...
Jason Cong, Hui Huang
137
Voted
CHES
2009
Springer
171views Cryptology» more  CHES 2009»
16 years 5 months ago
Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering
Abstract. The general trend in semiconductor industry to separate design from fabrication leads to potential threats from untrusted integrated circuit foundries. In particular, mal...
Christof Paar, Lang Lin, Markus Kasper, Tim Gü...