897 search results - page 16 / 180 » System-Level Design for FPGAs |
113
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ISLPED
2005
ACM
15 years 6 months ago
2005
ACM
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...
100
Voted
CHES
2007
Springer
15 years 6 months ago
2007
Springer
In recent years, IP protection of FPGA hardware designs has become a requirement for many IP vendors. In [34], Simpson and Schaumont proposed a fundamentally different approach to...
DATE
2006
IEEE
15 years 6 months ago
2006
IEEE
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
122
Voted
ECBS
2003
IEEE
15 years 5 months ago
2003
IEEE
Heterogeneous embedded systems, where configurable or application specific hardware devices (FPGAs and ASICs) are used alongside traditional processors, are becoming more and more...
118
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ICCD
2006
IEEE
15 years 9 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...