897 search results - page 20 / 180 » System-Level Design for FPGAs |
101
Voted
ICCD
2007
IEEE
15 years 9 months ago
2007
IEEE
This paper presents a methodology to generate a hierarchy of power models for power estimation of custom hardware IP blocks, enabling a trade-off between power estimation accuracy...
137
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VLSID
2005
IEEE
16 years 29 days ago
2005
IEEE
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
56
Voted
DATE
2005
IEEE
15 years 6 months ago
2005
IEEE
The SystemC modules of the Link Manager Layer and Baseband Layer have been designed in this work at behavioral level to analyze the performances of the Bluetooth standard. In part...
128
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TVLSI
2010
14 years 7 months ago
2010
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
111
Voted
ICCAD
2001
IEEE
15 years 9 months ago
2001
IEEE
This paper presents a new methodology for system-level power and performance analysis of wireless multimedia systems. More precisely, we introduce an analytical approach based on ...