897 search results - page 24 / 180 » System-Level Design for FPGAs |
138
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VLSID
2002
IEEE
16 years 4 months ago
2002
IEEE
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
109
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BSN
2009
IEEE
15 years 11 months ago
2009
IEEE
—A biomonitoring application running on wireless BAN has stringent timing and energy requirements. Developing such applications therefore presents unique challenges in both hardw...
145
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CISS
2007
IEEE
15 years 10 months ago
2007
IEEE
— Multihop relaying in cellular networks is seen as a viable strategy to address the need for higher data rates and better coverage. In this paper, we analyze the system-level pe...
122
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CODES
2007
IEEE
15 years 10 months ago
2007
IEEE
Compositional approaches to system-level performance analysis have shown great flexibility and scalability in the design of heterogeneous systems. These approaches often assume c...
142
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ISQED
2007
IEEE
15 years 10 months ago
2007
IEEE
With the increasing size and sophistication of circuits and specifically in the presence of IP blocks, new wirelength estimation methods are needed in the design flow of large-sca...