897 search results - page 43 / 180 » System-Level Design for FPGAs |
120
Voted
DAC
2003
ACM
16 years 4 months ago
2003
ACM
116
Voted
FCCM
2006
IEEE
15 years 9 months ago
2006
IEEE
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
113
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ERSA
2004
15 years 5 months ago
2004
In this paper, we propose an architecture for floatingpoint based LU decomposition for large-sized matrices. Our proposed architecture is based on the well known concept of blocki...
152
Voted
FPGA
2006
ACM
15 years 7 months ago
2006
ACM
The high unit cost of FPGA devices often deters their use beyond the prototyping stage. Efforts have been made to reduce the part-cost of FPGA devices, resulting in the developmen...
102
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ARITH
2001
IEEE
15 years 7 months ago
2001
IEEE
This paper presents an unified view of most previous table-lookup-and-addition methods: bipartite tables, SBTM, STAM and multipartite methods. This new definition allows a more ac...