897 search results - page 50 / 180 » System-Level Design for FPGAs |
139
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DAC
2006
ACM
16 years 5 months ago
2006
ACM
or Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdu...
150
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FPL
2007
Springer
15 years 10 months ago
2007
Springer
In recent years, IP protection of FPGA hardware designs has become a requirement for many IP vendors. To this end solutions have been proposed based on the idea of bitstream encry...
146
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EURODAC
1994
IEEE
15 years 8 months ago
1994
IEEE
This paper presents a multiple-FPGA-based experimentation board. The problem to be solved is that of implementing a circuit into a set of FPGAs. This board provides a hardware env...
138
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FPL
2008
Springer
15 years 5 months ago
2008
Springer
It is often desirable to change the logic and/or the connections within an FPGA design on-the-fly without the benefit of a workstation or vendor CAD software. This paper presents ...
136
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FPL
2005
Springer
15 years 9 months ago
2005
Springer
As the logic capacity of FPGA increases, there has been a corresponding increase in the variety of FPGA building blocks. From a mere collection of the conventional logic blocks, F...