897 search results - page 53 / 180 » System-Level Design for FPGAs |
135
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FPL
2005
Springer
15 years 9 months ago
2005
Springer
This paper presents a configuration memory architecture that offers fast FPGA reconfiguration. The underlying principle behind the design is the use of fine-grained partial rec...
155
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ISLPED
2004
ACM
15 years 9 months ago
2004
ACM
This paper presents a delay optimal FPGA clustering algorithm targeting low power. We assume that the configurable logic blocks of the FPGA can be programmed using either a high s...
157
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DATE
2002
IEEE
15 years 9 months ago
2002
IEEE
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
128
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JIRS
2007
15 years 4 months ago
2007
This paper presents a methodology for the realization of intelligent, task-based reconfiguration of the computational hardware for mobile robot applications. Task requirements are ...
140
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ASAP
2008
IEEE
15 years 10 months ago
2008
IEEE
RNA structure prediction, or folding, is a computeintensive task that lies at the core of several search applications in bioinformatics. We begin to address the need for high-thro...