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» System-Level Design for FPGAs
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132
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EH
2003
IEEE
135views Hardware» more  EH 2003»
15 years 9 months ago
Towards Evolvable IP Cores for FPGAs
The paper deals with a new approach to the design of adaptive hardware using common Field Programmable Gate Arrays (FPGA). The ultimate aim is to develop evolvable IP (Intellectua...
Lukás Sekanina
MSE
2003
IEEE
97views Hardware» more  MSE 2003»
15 years 9 months ago
Harnessing FPGAs for Computer Architecture Education
Computer architecture is often taught by having students use software to design and simulate individual pieces of a computer processor. We have developed a method that will take t...
Mark Holland, James Harris, Scott Hauck
ISCIS
2009
Springer
15 years 10 months ago
Halftoning soft cores for low-cost digital displays
This paper presents hardware design of a family of soft cores that improve image quality on low cost digital displaying devices with limited color palette. The twoelement half-toni...
Muhammet Erkoc, Arda Yurdakul
ARC
2007
Springer
119views Hardware» more  ARC 2007»
15 years 10 months ago
Authentication of FPGA Bitstreams: Why and How
Abstract. Encryption of volatile FPGA bitstreams provides confidentiality to the design but does not ensure its authenticity. This paper motivates the need for adding authenticati...
Saar Drimer
126
Voted
IPPS
1998
IEEE
15 years 8 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf