897 search results - page 58 / 180 » System-Level Design for FPGAs |
145
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ICS
2009
Tsinghua U.
15 years 11 months ago
2009
Tsinghua U.
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
135
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FPL
2001
Springer
15 years 8 months ago
2001
Springer
This paper presents parameterized module-generators for pipelined function evaluation using lookup tables, adders, shifters and multipliers. We discuss trade-offs involved between...
153
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DATE
2000
IEEE
15 years 8 months ago
2000
IEEE
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
228
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Lecture Notes
Driven by recent innovations in Field-Programmable Gate Arrays (FPGAs), reconfigurable computing offers unique ways to accelerate key algorithms. FPGAs offer a programmable logic f...
117
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ASPDAC
2004
ACM
15 years 9 months ago
2004
ACM
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we use a novel topo...