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FPGA
2010
ACM
294views FPGA» more  FPGA 2010»
15 years 9 months ago
Axel: a heterogeneous cluster with FPGAs and GPUs
This paper describes a heterogeneous computer cluster called Axel. Axel contains a collection of nodes; each node can include multiple types of accelerators such as FPGAs (Field P...
Kuen Hung Tsoi, Wayne Luk
FPGA
1998
ACM
146views FPGA» more  FPGA 1998»
15 years 8 months ago
Boolean Matching for Complex PLBs in LUT-based FPGAs with Application to Architecture Evaluation
In this paper, we developed Boolean matching techniques for complex programmable logic blocks (PLBs) in LUT-based FPGAs. A complex PLB can not only be used as a K-input LUT, but a...
Jason Cong, Yean-Yow Hwang
FPL
2006
Springer
242views Hardware» more  FPL 2006»
15 years 8 months ago
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Manuel Saldaña, Paul Chow
TVLSI
1998
99views more  TVLSI 1998»
15 years 3 months ago
Some experiments about wave pipelining on FPGA's
— Wave pipelining offers a unique combination of high speed, low latency, and moderate power consumption. The construction of wave pipelines is benefited by the use of gates and...
Eduardo I. Boemo, Sergio López-Buedo, Juan ...
ERSA
2010
199views Hardware» more  ERSA 2010»
15 years 2 months ago
Reconfigurable Sparse Matrix-Vector Multiplication on FPGAs
Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for sp...
Russell Tessier, Salma Mirza, J. Blair Perot