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FCCM
1998
IEEE
170views VLSI» more  FCCM 1998»
15 years 8 months ago
Characterization and Parameterization of a Pipeline Reconfigurable FPGA
ended abstract defines a class of architectures for pipeline reconfigurable FPGAs by parameterizing a generic model. This class of architectures is sufficiently general to allow e...
Matthew Moe, Herman Schmit, Seth Copen Goldstein
DAC
2007
ACM
16 years 5 months ago
GlitchMap: An FPGA Technology Mapper for Low Power Considering Glitches
In 90-nm technology, dynamic power is still the largest power source in FPGAs [1], and signal glitches contribute a large portion of the dynamic power consumption. Previous powera...
Lei Cheng, Deming Chen, Martin D. F. Wong
ICCAD
2004
IEEE
113views Hardware» more  ICCAD 2004»
16 years 1 months ago
Vdd programmability to reduce FPGA interconnect power
Power is an increasingly important design constraint for FPGAs in nanometer technologies. Because interconnect power is dominant in FPGAs, we design Vdd-programmable interconnect ...
Fei Li, Yan Lin, Lei He
124
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FCCM
2006
IEEE
101views VLSI» more  FCCM 2006»
15 years 10 months ago
A Type Architecture for Hybrid Micro-Parallel Computers
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
FPL
2007
Springer
115views Hardware» more  FPL 2007»
15 years 10 months ago
Hardware/Software Process Migration and RTL Simulation
This paper describes an execution cache that uses process migration between hardware and software contexts by way of run-time reconfiguration (RTR) of Field Programmable Gate Arr...
Aric D. Blumer, Cameron D. Patterson