ended abstract defines a class of architectures for pipeline reconfigurable FPGAs by parameterizing a generic model. This class of architectures is sufficiently general to allow e...
In 90-nm technology, dynamic power is still the largest power source in FPGAs [1], and signal glitches contribute a large portion of the dynamic power consumption. Previous powera...
Power is an increasingly important design constraint for FPGAs in nanometer technologies. Because interconnect power is dominant in FPGAs, we design Vdd-programmable interconnect ...
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
This paper describes an execution cache that uses process migration between hardware and software contexts by way of run-time reconfiguration (RTR) of Field Programmable Gate Arr...