897 search results - page 86 / 180 » System-Level Design for FPGAs |
157
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ISCAS
2005
IEEE
15 years 10 months ago
2005
IEEE
Abstract— In many image processing applications, fast convolution of an image with a large 2D filter is required. Field Programable Gate Arrays (FPGAs) are often used to achieve...
123
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FPL
1999
Springer
15 years 8 months ago
1999
Springer
Abstract. High-performance design flows for FPGAs often rely on module generators to counter coarse logic-block granularity and limited routing resources, However, the very flexi...
140
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ERSA
2007
15 years 5 months ago
2007
”C to Gates” compilers for FPGAs have been a topic of investigation for nearly two decades. Some of these endeavors have reached a point of viability. Impulse C, for example, ...
111
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IH
1998
Springer
15 years 8 months ago
1998
Springer
Advanced CAD tools and high-density VLSI technologies have combined to create a new market for reusable digital designs. The economic viability of the new core-based design paradig...
118
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DATE
2005
IEEE
15 years 10 months ago
2005
IEEE
This paper presents the methodology and the modeling constructs we have developed to capture the real time aspects of RTOS simulation models in a System Level Design Language (SLD...