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CIDR
2011
234views Algorithms» more  CIDR 2011»
14 years 8 months ago
SWissBox: An Architecture for Data Processing Appliances
Database appliances offer fully integrated hardware, storage, operating system, database, and related software in a single package. Database appliances have a relatively long hist...
Gustavo Alonso, Donald Kossmann, Timothy Roscoe
ICCAD
1995
IEEE
106views Hardware» more  ICCAD 1995»
15 years 8 months ago
Re-engineering of timing constrained placements for regular architectures
In a typical design ow, the design may be altered slightly several times after the initial design cycle according to minor changes in the design speci cation either as a result o...
Anmol Mathur, K. C. Chen, C. L. Liu
DAC
2006
ACM
16 years 5 months ago
A new hybrid FPGA with nanoscale clusters and CMOS routing
In this paper we propose a hybrid FPGA using nanoscale clusters with an architecture similar to clusters of traditional CMOS FPGAs. The proposed cluster is made of a crossbar of n...
Reza M. Rad, Mohammad Tehranipoor
118
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ICCD
2007
IEEE
206views Hardware» more  ICCD 2007»
16 years 1 months ago
SCAFFI: An intrachip FPGA asynchronous interface based on hard macros
Building fully synchronous VLSI circuits is becoming less viable as circuit geometries evolve. However, before the adoption of purely asynchronous strategies in VLSI design, globa...
Julian J. H. Pontes, Rafael Soares, Ewerson Carval...
EURODAC
1995
IEEE
153views VHDL» more  EURODAC 1995»
15 years 8 months ago
VHDL-based communication and synchronization synthesis
This paper describes an approach for VHDL-based communication and synchronization synthesis. This design step transforms a system level VHDL description into an RT-level descripti...
Wolfgang Ecker, Manfred Huber