897 search results - page 91 / 180 » System-Level Design for FPGAs |
132
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ERSA
2006
15 years 5 months ago
2006
- An intrinsic embedded online evolution system has been designed using Block-based neural networks and implemented on Xilinx VirtexIIPro FPGAs. The designed network can dynamicall...
142
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FPL
2004
Springer
15 years 10 months ago
2004
Springer
Abstract. Evolvable Hardware (EHW) is a scheme - inspired by natural evolution, for automatic design of hardware systems. By exploring a large design search space, EHW may find so...
135
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FDL
2005
IEEE
15 years 10 months ago
2005
IEEE
In today’s flows, there is still a gap between system level description and hardware implementation, especially for analog/RF building blocks. SystemC-AMS or co-simulations have...
142
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DAC
2006
ACM
16 years 5 months ago
2006
ACM
Since performance on FPGAs is dominated by the routing architecture rather than wirelength, we propose a new architecture-aware approach to initial FPGA placement that models the ...
119
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CORR
2008
Springer
15 years 4 months ago
2008
Springer
This paper presents one MEMS design tool with total six design flows, which makes it possible that the MEMS designers are able to choose the most suitable design flow for their sp...