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140
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ICCD
2005
IEEE
176views Hardware» more  ICCD 2005»
16 years 16 days ago
A Formal Framework for Modeling and Analysis of System-Level Dynamic Power Management
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
Shrirang M. Yardi, Karthik Channakeshava, Michael ...
126
Voted
CODES
2005
IEEE
15 years 9 months ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...
166
Voted
CODES
2009
IEEE
15 years 10 months ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
142
Voted
RTAS
2009
IEEE
15 years 10 months ago
The System-Level Simplex Architecture for Improved Real-Time Embedded System Safety
Embedded systems in safety-critical environments demand safety guarantees while providing many useful services that are too complex to formally verify or fully test. Existing appl...
Stanley Bak, Deepti K. Chivukula, Olugbemiga Adeku...
147
Voted
DAC
1997
ACM
15 years 7 months ago
System Level Fixed-Point Design Based on an Interpolative Approach
The design process for xed-point implementations either in software or in hardware requires a bit-true speci cation of the algorithm in order to analyze quantization e ects on an...
Markus Willems, Volker Bürsgens, Holger Kedin...