217 search results - page 35 / 44 » System-Level Modeling and Verification: a Comprehensive Desi... |
BCS
2008
14 years 11 months ago
2008
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
96
Voted
FPGA
2003
ACM
15 years 2 months ago
2003
ACM
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
116
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DAC
2006
ACM
15 years 10 months ago
2006
ACM
Modern integrated circuits (ICs) are becoming increasingly complex. The complexity makes it difficult to design, manufacture and integrate these high-performance ICs. The advent o...
82
Voted
ICCD
2008
IEEE
15 years 6 months ago
2008
IEEE
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...
85
Voted
SIGSOFT
2003
ACM
15 years 10 months ago
2003
ACM
State machine based formalisms such as labelled transition systems (LTS) are generally assumed to be complete descriptions m behaviour at some level of abstraction: if a labelled ...