217 search results - page 8 / 44 » System-Level Modeling and Verification: a Comprehensive Desi... |
FPL
2006
Springer
15 years 1 months ago
2006
Springer
This paper provides a realistic case study of using the previously introduced SIMPPL system architectural model, which fixes the physical interface and communication protocols bet...
LCTRTS
2010
Springer
15 years 4 months ago
2010
Springer
This paper extends the methodology of analytic real-time analysis of distributed embedded systems towards merging and extracting sub-streams based on event type information. For e...
VLSID
2003
IEEE
15 years 10 months ago
2003
IEEE
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
DAC
1997
ACM
15 years 1 months ago
1997
ACM
Cr, As the complexity of high-performance microprocessor increases, functional verification becomes more and more difficult and RTL simulation emerges as the bottleneck of the des...
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...