Sciweavers

217 search results - page 9 / 44
» System-Level Modeling and Verification: a Comprehensive Desi...
Sort
View
HPCA
2008
IEEE
15 years 9 months ago
System level analysis of fast, per-core DVFS using on-chip switching regulators
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known techniq...
Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, Dav...
TCAD
2008
167views more  TCAD 2008»
14 years 9 months ago
System-Level Dynamic Thermal Management for High-Performance Microprocessors
Abstract--Thermal issues are fast becoming major design constraints in high-performance systems. Temperature variations adversely affect system reliability and prompt worst-case de...
Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K....
IJISEC
2006
88views more  IJISEC 2006»
14 years 9 months ago
Requirements engineering for trust management: model, methodology, and reasoning
Abstract A number of recent proposals aim to incorporate security engineering into mainstream software engineering. Yet, capturing trust and security requirements at an organizatio...
Paolo Giorgini, Fabio Massacci, John Mylopoulos, N...
ITC
2003
IEEE
135views Hardware» more  ITC 2003»
15 years 2 months ago
MEMS Design And Verification
The long term impact of MEMS technology will be in its ability to integrate novel sensing and actuation functionality on traditional computing and communication devices enabling t...
Tamal Mukherjee
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
15 years 6 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna