77 search results - page 12 / 16 » Systematic Transaction Level Modeling of Embedded Systems wi... |
CODES
2002
IEEE
15 years 2 months ago
2002
IEEE
High-speed serial network interfaces are gaining wide use in connecting multiple processors and peripherals in modern embedded systems, thanks to their size advantage and power ef...
FDL
2005
IEEE
15 years 3 months ago
2005
IEEE
The support of heterogeneity at the specification level, that is, the ability to mix several models of computation (MoCs) in the system-level specification, is becoming increasing...
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Voted
WORDS
2005
IEEE
15 years 3 months ago
2005
IEEE
We have previously presented initial results of a case study which illustrated an approach to engineering protective wrappers as a means of detecting errors or unwanted behaviour ...
DSD
2009
IEEE
15 years 4 months ago
2009
IEEE
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
Transaction Level Modeling (TLM) is an emerging design practice for overcoming increasing design complexity. It aims at simplifying the design flow of embedded systems ning and v...