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JUCS
2006
112views more  JUCS 2006»
14 years 9 months ago
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
ICS
2007
Tsinghua U.
15 years 3 months ago
Performance driven data cache prefetching in a dynamic software optimization system
Software or hardware data cache prefetching is an efficient way to hide cache miss latency. However effectiveness of the issued prefetches have to be monitored in order to maximi...
Jean Christophe Beyler, Philippe Clauss
DAC
2005
ACM
15 years 10 months ago
Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
Jungeun Kim, Taewhan Kim
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
15 years 2 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for application−specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
AGI
2008
14 years 11 months ago
Artificial General Intelligence through Large-Scale, Multimodal Bayesian Learning
Abstract. An artificial system that achieves human-level performance on opendomain tasks must have a huge amount of knowledge about the world. We argue that the most feasible way t...
Brian Milch