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CODES
2007
IEEE
15 years 8 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
ICSEA
2007
IEEE
15 years 8 months ago
Test Data Generation from UML State Machine Diagrams using GAs
Automatic test data generation helps testers to validate software against user requirements more easily. Test data can be generated from many sources; for example, experience of t...
Chartchai Doungsa-ard, Keshav P. Dahal, M. Alamgir...
IEEEPACT
2007
IEEE
15 years 8 months ago
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
TPHOL
2007
IEEE
15 years 8 months ago
Verifying Nonlinear Real Formulas Via Sums of Squares
Techniques based on sums of squares appear promising as a general approach to the universal theory of reals with addition and multiplication, i.e. verifying Boolean combinations of...
John Harrison
CC
2007
Springer
129views System Software» more  CC 2007»
15 years 8 months ago
Extended Linear Scan: An Alternate Foundation for Global Register Allocation
In this paper, we extend past work on Linear Scan register allocation, and propose two Extended Linear Scan (ELS) algorithms that retain the compiletime efficiency of past Linear ...
Vivek Sarkar, Rajkishore Barik
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