Sciweavers

439 search results - page 45 / 88
» Tabling for transaction logic
Sort
View
CF
2008
ACM
15 years 1 months ago
Exact combinational logic synthesis and non-standard circuit design
Using a new exact synthesizer that automatically induces minimal universal boolean function libraries, we introduce two indicators for comparing their expressiveness: the first ba...
Paul Tarau, Brenda Luderman
DAC
2006
ACM
16 years 24 days ago
Statistical logic cell delay analysis using a current-based model
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
Hanif Fatemi, Shahin Nazarian, Massoud Pedram
DAC
1998
ACM
16 years 24 days ago
Exact Tree-based FPGA Technology Mapping for Logic Blocks with Independent LUTs
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
Madhukar R. Korupolu, K. K. Lee, D. F. Wong
VLSID
2009
IEEE
130views VLSI» more  VLSID 2009»
16 years 13 days ago
Reversible Logic Synthesis with Output Permutation
Synthesis of reversible logic has become a very important research area. In recent years several algorithms ? heuristic as well as exact ones ? have been introduced in this area. ...
Daniel Große, Gerhard W. Dueck, Robert Wille...
CAISE
2003
Springer
15 years 5 months ago
On the Applicability of Rules to Automate Data Warehouse Logical Design
Data Warehouse logical design involves the definition of structures that enable an efficient access to information. The designer builds relational or multidimensional structures ta...
Verónika Peralta, Alvaro Illarze, Raul Rugg...