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ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
15 years 3 months ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...
IPPS
2005
IEEE
15 years 3 months ago
Self-Managing Sensor-Based Middleware for Performance Monitoring and Data Integration in Grids
This paper describes a sensor-based middleware for performance monitoring and data integration in the Grid that is capable of self-management. The middleware unifies both system ...
Hong Linh Truong, Thomas Fahringer
IPPS
2002
IEEE
15 years 2 months ago
Heaps and Stacks in Distributed Shared Memory
Software-based distributed shared memory (DSM) systems do usually not provide any means to use shared memory regions as stacks or via an efficient heap memory allocator. Instead ...
Markus Pizka, Christian Rehn
IPPS
2000
IEEE
15 years 2 months ago
Memory Management in a Combined VIA/SCI Hardware
Abstract In this document we make a brief review of memory management and DMA considerations in case of common SCI hardware and the Virtual Interface Architecture. On this basis we...
Mario Trams, Wolfgang Rehm, Daniel Balkanski, Stan...
IPPS
2010
IEEE
14 years 7 months ago
Hardware implementation for scalable lookahead Regular Expression detection
Regular Expressions (RegExes) are widely used in various applications to identify strings of text. Their flexibility, however, increases the complexity of the detection system and ...
Masanori Bando, N. Sertac Artan, Nishit Mehta, Yi ...