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DAC
2009
ACM
15 years 5 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
INFOCOM
2008
IEEE
15 years 5 months ago
Spot Pricing of Secondary Spectrum Usage in Wireless Cellular Networks
—Recent deregulation initiatives enable cellular providers to sell excess spectrum for secondary usage. In this paper, we investigate the problem of optimal spot pricing of spect...
Huseyin Mutlu, Murat Alanyali, David Starobinski
PODC
1999
ACM
15 years 3 months ago
Dynamically Configurable Distributed Objects
The dynamically configurable distributed object (DCDO) model helps enable object evolution and facilitate the development of distributed objects from multiple independent implemen...
Michael J. Lewis, Andrew S. Grimshaw
84
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COMPSAC
2004
IEEE
15 years 2 months ago
Software Reliability Growth Models Incorporating Fault Dependency with Various Debugging Time Lags
Software reliability is defined as the probability of failure-free software operation for a specified period of time in a specified environment. Over the past 30 years, many softw...
Chin-Yu Huang, Chu-Ti Lin, Sy-Yen Kuo, Michael R. ...
DIAGRAMS
2006
Springer
15 years 1 months ago
From Diagrams to Models by Analogical Transfer
Abstract. We present a method for constructing a teleological model of a drawing of a physical device through analogical transfer of the teleological model of the same device in an...
Patrick W. Yaner, Ashok K. Goel