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SIGMETRICS
1997
ACM
117views Hardware» more  SIGMETRICS 1997»
15 years 3 months ago
Informed Multi-Process Prefetching and Caching
Informed prefetching and caching based on application disclosure of future I/O accesses (hints) can dramatically reduce the execution time of I/O-intensive applications. A recent ...
Andrew Tomkins, R. Hugo Patterson, Garth A. Gibson
ICS
2000
Tsinghua U.
15 years 3 months ago
Hardware-only stream prefetching and dynamic access ordering
Memory system bottlenecks limit performance for many applications, and computations with strided access patterns are among the hardest hit. The streams used in such applications h...
Chengqiang Zhang, Sally A. McKee
MICRO
2005
IEEE
140views Hardware» more  MICRO 2005»
15 years 5 months ago
Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor
Data prefetching via helper threading has been extensively investigated on Simultaneous MultiThreading (SMT) or Virtual Multi-Threading (VMT) architectures. Although reportedly la...
Jiwei Lu, Abhinav Das, Wei-Chung Hsu, Khoa Nguyen,...
ESA
2001
Springer
75views Algorithms» more  ESA 2001»
15 years 4 months ago
Strongly Competitive Algorithms for Caching with Pipelined Prefetching
Suppose that a program makes a sequence of m accesses (references) to data blocks, the cache can hold k < m blocks, an access to a block in the cache incurs one time unit, and ...
Alexander Gaysinsky, Alon Itai, Hadas Shachnai
CF
2008
ACM
15 years 1 months ago
DMA-based prefetching for i/o-intensive workloads on the cell architecture
Recent advent of the asymmetric multi-core processors such as Cell Broadband Engine (Cell/BE) has popularized the use of heterogeneous architectures. A growing body of research is...
M. Mustafa Rafique, Ali Raza Butt, Dimitrios S. Ni...