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ISPD
2010
ACM
160views Hardware» more  ISPD 2010»
15 years 10 months ago
Physical synthesis of bus matrix for high bandwidth low power on-chip communications
As the thermal wall becomes the dominant factor limiting VLSI circuit performance, and the interconnect wires become the primary power consumer, power efficiency of onchip data th...
Renshen Wang, Evangeline F. Y. Young, Ronald L. Gr...
ISPASS
2009
IEEE
15 years 10 months ago
Lonestar: A suite of parallel irregular programs
Until recently, parallel programming has largely focused on the exploitation of data-parallelism in dense matrix programs. However, many important application domains, including m...
Milind Kulkarni, Martin Burtscher, Calin Cascaval,...
PDP
2009
IEEE
15 years 10 months ago
A Parallel Implementation of the 2D Wavelet Transform Using CUDA
There is a multicore platform that is currently concentrating an enormous attention due to its tremendous potential in terms of sustained performance: the NVIDIA Tesla boards. The...
Joaquín Franco, Gregorio Bernabé, Ju...
ICFCA
2009
Springer
15 years 10 months ago
Yet a Faster Algorithm for Building the Hasse Diagram of a Concept Lattice
Formal concept analysis (FCA) is increasingly applied to data mining problems, essentially as a formal framework for mining reduced representations (bases) of target pattern famili...
Jaume Baixeries, Laszlo Szathmary, Petko Valtchev,...
CIDM
2009
IEEE
15 years 10 months ago
A new hybrid method for Bayesian network learning With dependency constraints
Abstract— A Bayes net has qualitative and quantitative aspects: The qualitative aspect is its graphical structure that corresponds to correlations among the variables in the Baye...
Oliver Schulte, Gustavo Frigo, Russell Greiner, We...