The aim of the hArtes project is to facilitate and automate the rapid design and development of heterogeneous embedded systems, targeting a combination of a general purpose embedd...
Koen Bertels, Georgi Kuzmanov, Elena Moscu Panaint...
Current day network processors incorporate several architectural features including symmetric multi-processing (SMP), block multi-threading, and multiple memory elements to suppor...
The programming and retasking of sensor nodes could benefit greatly from the use of a virtual machine (VM) since byte code is compact, can be loaded on demand, and interpreted on...
We provide a general framework for the analysis of the capacity scaling properties in mobile ad-hoc networks with heterogeneous nodes and spatial inhomogeneities. Existing analyti...
Many high-end DSP processors employ both multiple memory banks and heterogeneous register files to improve performance and power consumption. The complexity of such architectures ...