252 search results - page 44 / 51 » Task Assignment and Scheduling under Memory Constraints |
137
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CASES
2004
ACM
15 years 11 months ago
2004
ACM
Abstract— In a direct-mapped instruction cache, all instructions that have the same memory address modulo the cache size, share a common and unique cache slot. Instruction cache ...
187
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ICCAD
2003
IEEE
16 years 2 months ago
2003
IEEE
Abstract— Dynamic voltage scaling (DVS) is a powerful technique for reducing dynamic power consumption in a computing system. However, as technology feature size continues to sca...
185
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RSP
2006
IEEE
15 years 11 months ago
2006
IEEE
Embedded real-time multimedia applications usually imply data parallel processing. SIMD processors embedded in SOCs are cost-effective to exploit the underlying parallelism. Howev...
161
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COMPSAC
1999
IEEE
15 years 9 months ago
1999
IEEE
The Brooks' Law says that adding manpower to a late software project makes it later. Brooks developed the law through observation of many projects and derived the generalizat...
169
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PC
1998
15 years 5 months ago
1998
The difficulty of handling out-of-core data limits the performance of supercomputers as well as the potential of the parallel machines. Since writing an efficient out-of-core ve...