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» Taylor Expansion Diagrams: A Compact, Canonical Representati...
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36
Voted
DATE
2002
IEEE
65views Hardware» more  DATE 2002»
15 years 2 months ago
Taylor Expansion Diagrams: A Compact, Canonical Representation with Applications to Symbolic Verification
Maciej J. Ciesielski, Priyank Kalla, Zhihong Zeng,...
ATVA
2010
Springer
154views Hardware» more  ATVA 2010»
14 years 10 months ago
Lattice-Valued Binary Decision Diagrams
Abstract. This work introduces a new data structure, called Lattice-Valued Binary Decision Diagrams (or LVBDD for short), for the compact representation and manipulation of functio...
Gilles Geeraerts, Gabriel Kalyon, Tristan Le Gall,...
73
Voted
DATE
2009
IEEE
120views Hardware» more  DATE 2009»
15 years 4 months ago
Optimizing data flow graphs to minimize hardware implementation
Abstract - This paper describes an efficient graphbased method to optimize data-flow expressions for best hardware implementation. The method is based on factorization, common su...
Daniel Gomez-Prado, Q. Ren, Maciej J. Ciesielski, ...
PLDI
2004
ACM
15 years 3 months ago
Symbolic pointer analysis revisited
Pointer analysis is a critical problem in optimizing compiler, parallelizing compiler, software engineering and most recently, hardware synthesis. While recent efforts have sugges...
Jianwen Zhu, Silvian Calman
APN
2008
Springer
14 years 11 months ago
MC-SOG: An LTL Model Checker Based on Symbolic Observation Graphs
Model checking is a powerful and widespread technique for the verification of finite distributed systems. However, the main hindrance for wider application of this technique is the...
Kais Klai, Denis Poitrenaud