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ISQED
2008
IEEE
153views Hardware» more  ISQED 2008»
16 years 17 days ago
Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding
Clock meshes have found increasingly wide applications in today’s high-performance IC designs. The inherent routing redundancies associated with clock meshes lead to improved cl...
Xiaoji Ye, Min Zhao, Rajendran Panda, Peng Li, Jia...
MOBIQUITOUS
2007
IEEE
16 years 13 days ago
Battery-Aware Embedded GPS Receiver Node
—This paper discusses the design and implementation of an ultra low power embedded GPS receiver node for use in remote monitoring situations where battery life is of the utmost i...
Dejan Raskovic, David Giessel
DATE
2006
IEEE
114views Hardware» more  DATE 2006»
16 years 6 days ago
COSMECA: application specific co-synthesis of memory and communication architectures for MPSoC
Memory and communication architectures have a significant impact on the cost, performance, and time-to-market of complex multi-processor system-on-chip (MPSoC) designs. The memory...
Sudeep Pasricha, Nikil D. Dutt
ISCA
2006
IEEE
162views Hardware» more  ISCA 2006»
16 years 5 days ago
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
Feihui Li, Chrysostomos Nicopoulos, Thomas D. Rich...
AINA
2005
IEEE
15 years 11 months ago
A Single-Computer Grid Gateway Using Virtual Machines
Grid middleware is enabling resource sharing between computing centres across the world and sites with existing clusters are eager to connect to the Grid. However, the hardware re...
Stephen Childs, Brian A. Coghlan, David O'Callagha...