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MICRO
2006
IEEE
98views Hardware» more  MICRO 2006»
16 years 2 days ago
ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers
The advent of deep sub-micron technology has recently highlighted the criticality of the on-chip interconnects. As diminishing feature sizes have led to increases in global wiring...
Chrysostomos Nicopoulos, Dongkook Park, Jongman Ki...
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
16 years 1 days ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
ISPD
2004
ACM
146views Hardware» more  ISPD 2004»
15 years 11 months ago
Power-aware clock tree planning
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
Monica Donno, Enrico Macii, Luca Mazzoni
ATVA
2004
Springer
146views Hardware» more  ATVA 2004»
15 years 11 months ago
A Global Timed Bisimulation Preserving Abstraction for Parametric Time-Interval Automata
Timed Bisimulation Preserving Abstraction for Parametric Time-Interval Automata Akio Nakata, Tadaaki Tanimoto, Suguru Sasaki, Teruo Higashino Department of Information Networking, ...
Tadaaki Tanimoto, Suguru Sasaki, Akio Nakata, Teru...
CODES
2003
IEEE
15 years 11 months ago
First results with eBlocks: embedded systems building blocks
We describe our first efforts to develop a set of off-the-shelf hardware components that ordinary people could connect to build a simple but useful class of embedded systems. The ...
Susan Cotterell, Frank Vahid, Walid A. Najjar, Har...