Sciweavers

3340 search results - page 615 / 668
» Teaching networking hardware
Sort
View
FPL
2005
Springer
112views Hardware» more  FPL 2005»
15 years 3 months ago
Defect-Tolerant FPGA Switch Block and Connection Block with Fine-Grain Redundancy for Yield Enhancement
Future process nodes have such small feature sizes that there will be an increase in the number of manufacturing defects per die. For large FPGAs, it will be critical to tolerate ...
Anthony J. Yu, Guy G. Lemieux
FPL
2005
Springer
226views Hardware» more  FPL 2005»
15 years 3 months ago
A Parallel MPEG-4 Encoder for FPGA Based Multiprocessor SoC
A parallel MPEG-4 Simple Profile encoder for FPGA based multiprocessor System-on-Chip (SOC) is presented. The goal is a computationally scalable framework independent of platform....
Olli Lehtoranta, Erno Salminen, Ari Kulmala, Marko...
FPL
2005
Springer
111views Hardware» more  FPL 2005»
15 years 3 months ago
Mutable Codesign for Embedded Protocol Processing
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...
Todd S. Sproull, Gordon J. Brebner, Christopher E....
ICCSA
2005
Springer
15 years 3 months ago
Implementing Immersive Clustering with VR Juggler
Abstract. The last advances in commodity hardware have allowed users of immersive visualization to create high-performance systems using a set of interconnected computers. These sy...
Aron Bierbaum, Patrick Hartling, Pedro Morillo, Ca...
ICS
2005
Tsinghua U.
15 years 3 months ago
Optimization of MPI collective communication on BlueGene/L systems
BlueGene/L is currently the world’s fastest supercomputer. It consists of a large number of low power dual-processor compute nodes interconnected by high speed torus and collect...
George Almási, Philip Heidelberger, Charles...