We present an architecture and hardware for scheduling gigabit packet streams in server clusters that combines a Network Processor datapath and an FPGA for use in server NICs and ...
In this paper, we present and illustrate an approach to compositional reasoning for hardware/software co-verification of embedded systems. The major challenges in compositional rea...
—Several alternatives of mesh-type topologies have been published for the use in Networks-on-Chip. Due to their regularity, mesh-type topologies often serve as a foundation to in...
Claas Cornelius, Philipp Gorski, Stephan Kubisch, ...
This paper introduces the Perplexus hardware platform, a scalable computing substrate made of custom reconfigurable devices endowed with bio-inspired capabilities. This platform w...
Andres Upegui, Yann Thoma, Eduardo Sanchez, Andr&e...