1616 search results - page 304 / 324 » Techniques for Achieving High Performance Web Servers |
146
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PIMRC
2010
IEEE
14 years 11 months ago
2010
IEEE
Abstract--In wireless ad hoc networks, multiple access interference is the limiting factor for the overall system performance. The lack of any central control unit necessitates a c...
114
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ISCA
1994
IEEE
15 years 6 months ago
1994
IEEE
Today's commodity microprocessors require a low latency memory system to achieve high sustained performance. The conventional high-performance memory system provides fast dat...
111
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ICPP
2008
IEEE
15 years 8 months ago
2008
IEEE
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...
138
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MICRO
2007
IEEE
15 years 8 months ago
2007
IEEE
Program runtime characteristics exhibit significant variation. As microprocessor architectures become more complex, their efficiency depends on the capability of adapting with wor...
110
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CORR
2006
Springer
15 years 1 months ago
2006
Springer
Research on performance, robustness, and evolution of the global Internet is fundamentally handicapped without accurate and thorough knowledge of the nature and structure of the c...