176 search results - page 12 / 36 » Techniques for Functional Test Pattern Execution |
ITC
1993
IEEE
15 years 3 months ago
1993
IEEE
This paper describes a technique which uses the Differential Non Linearity (DNL) test data for fault location and identification of the analog components of a flash ADC. In a flash...
FMICS
2006
Springer
15 years 3 months ago
2006
Springer
Abstract. The design flow of systems-on-a-chip (SoCs) identifies several abstraction levels higher than the Register-Transfer-Level that constitutes the input of the synthesis tool...
GW
2009
Springer
14 years 9 months ago
2009
Springer
Abstract. We describe a numerical method for scale invariant detection of gesture patterns in continuous 2D motions. The algorithm is fast due to our rejection-based reasoning achi...
VLSID
2002
IEEE
16 years 15 hour ago
2002
IEEE
IDDQ testing has been used as a test technique to supplement voltage testing of CMOS chips. The idea behind IDDQ testing is to declare a chip as faulty if the steady-state current...
BMCBI
2008
2008
Relating gene expression data on two-component systems to functional annotations in Escherichia coli
14 years 11 months ago
Background: Obtaining physiological insights from microarray experiments requires computational techniques that relate gene expression data to functional information. Traditionall...