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» Techniques for Optimization of Net Algorithms
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VTS
2002
IEEE
120views Hardware» more  VTS 2002»
15 years 3 months ago
Software-Based Weighted Random Testing for IP Cores in Bus-Based Programmable SoCs
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
Madhu K. Iyer, Kwang-Ting Cheng
ICIP
2000
IEEE
15 years 2 months ago
Switched Error Concealment and Robust Coding Decisions in Scalable Video Coding
This work introduces two complementary techniques to improve the packet loss resilience of scalable video coding systems. First, a “switch per-pixel” error concealment (SPEC) ...
Rui Zhang, Shankar L. Regunathan, Kenneth Rose
CHES
2000
Springer
75views Cryptology» more  CHES 2000»
15 years 2 months ago
A 155 Mbps Triple-DES Network Encryptor
The presented Triple-DES encryptor is a single-chip solution to encrypt network communication. It is optimized for throughput and fast switching between virtual connections like fo...
Herbert Leitold, Wolfgang Mayerwieser, Udo Payer, ...
ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
15 years 2 months ago
Multi-objective design strategy for high-level low power design of DSP systems
High-level power design presents a complex, multiobjective problem that involves the simultaneous optimisation of competing criteria such as speed, area and power. It is difficult...
Mark S. Bright, Tughrul Arslan
ICCAD
1998
IEEE
112views Hardware» more  ICCAD 1998»
15 years 2 months ago
Using precomputation in architecture and logic resynthesis
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...
Soha Hassoun, Carl Ebeling