77 search results - page 3 / 16 » Techniques for Region-Based Register Allocation |
CC
2010
Springer
14 years 1 months ago
2010
Springer
Abstract. This paper deals with coalescing in SSA-based register allocation. Current coalescing techniques all require the interference graph to be built. This is generally conside...
ISCA
1991
IEEE
13 years 9 months ago
1991
IEEE
When address reference streams exhibit high degrees of spatial and temporal locality, many of the higher order address lines carry redundant information. By caching the higher ord...
DATE
1999
IEEE
1999
IEEE
Accounting for Various Register Allocation Schemes During Post-Synthesis Verification of RTL Designs
13 years 10 months ago
This paper reports a formal methodology for verifying a broad class of synthesized register-transfer-level (RTL) designs by accommodating various register allocation/optimization ...
ASAP
2006
IEEE
13 years 8 months ago
2006
IEEE
In today's embedded systems, memory hierarchy is rapidly becoming a major factor in terms of power, performance and area. This is especially true for embedded multimedia appl...
LCTRTS
2007
Springer
14 years 11 days ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...