Sciweavers

684 search results - page 70 / 137
» Techniques for low energy software
Sort
View
DAC
2006
ACM
16 years 24 days ago
Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...
Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil...
CODES
2007
IEEE
15 years 6 months ago
Scheduling and voltage scaling for energy/reliability trade-offs in fault-tolerant time-triggered embedded systems
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...
Paul Pop, Kåre Harbo Poulsen, Viacheslav Izo...
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
15 years 5 months ago
A first look at the interplay of code reordering and configurable caches
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt
BSN
2009
IEEE
160views Sensor Networks» more  BSN 2009»
15 years 6 months ago
BSN Simulator: Optimizing Application Using System Level Simulation
—A biomonitoring application running on wireless BAN has stringent timing and energy requirements. Developing such applications therefore presents unique challenges in both hardw...
Ioana Cutcutache, Thi Thanh Nga Dang, Wai Kay Leon...
ISBI
2008
IEEE
16 years 17 days ago
Towards high-throughput FLIM for protein-protein interaction screening of live cells and tissue microarrays
Studying cellular protein-protein interactions in situ requires a technique such as fluorescence resonance energy transfer (FRET) which is sensitive on the nanometer scale. Observ...
Paul R. Barber, Glenn P. Pierce, Simon M. Ameer-Be...