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HIPEAC
2009
Springer
15 years 9 months ago
Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering
Abstract. In transactional memory, aborted transactions reduce performance, and waste computing resources. Ideally, concurrent execution of transactions should be optimally ordered...
Mohammad Ansari, Mikel Luján, Christos Kots...
HPCA
2009
IEEE
16 years 5 months ago
Versatile prediction and fast estimation of Architectural Vulnerability Factor from processor performance metrics
The shrinking processor feature size, lower threshold voltage and increasing clock frequency make modern processors highly vulnerable to transient faults. Architectural Vulnerabil...
Lide Duan, Bin Li, Lu Peng
IEEEPACT
2008
IEEE
15 years 11 months ago
Skewed redundancy
Technology scaling in integrated circuits has consistently provided dramatic performance improvements in modern microprocessors. However, increasing device counts and decreasing o...
Gordon B. Bell, Mikko H. Lipasti
EOR
2006
66views more  EOR 2006»
15 years 5 months ago
Performance prediction of an unmanned airborne vehicle multi-agent system
Consider unmanned airborne vehicle (UAV) control agents in a dynamic multi-agent system. The agents must have a set of goals such as destination airport and intermediate positions...
Zhaotong Lian, Abhijit Deshmukh
FCCM
2006
IEEE
106views VLSI» more  FCCM 2006»
15 years 11 months ago
Scalable Hardware Architecture for Real-Time Dynamic Programming Applications
Abstract— This paper introduces a novel architecture for performing the core computations required by dynamic programming (DP) techniques. The latter pertain to a vast range of a...
Brad Matthews, Itamar Elhanany