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» Technology Mapping for Electrically Programmable Gate Arrays
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GLVLSI
1998
IEEE
129views VLSI» more  GLVLSI 1998»
13 years 10 months ago
Stochastic Evolution Algorithm For Technology Mapping
A new technology mapper SELF-Map for LookUp Table LUT based Field Programmable Gate Arrays FPGAs is described. SELF-Map is based on the Stochastic Evolution SE algorithm. The stat...
Ahmad S. Al-Mulhem, Alaaeldin Amin, Habib Youssef
ISQED
2002
IEEE
123views Hardware» more  ISQED 2002»
13 years 11 months ago
Reliable Laser Programmable Gate Array Technology
Field-Programmable Gate Arrays have become popular
Zhuo Gao, Ji Luo, Hu Huang, Wei Zhang, Joseph B. B...
ICPR
2002
IEEE
14 years 7 months ago
Implementing Image Applications on FPGAs
The Cameron project has developed a language and compiler for mapping image-based applications to field programmable gate arrays (FPGAs). This paper tests this technology on sever...
A. P. Wim Böhm, Bruce A. Draper, Charles Ross...
ISPD
2005
ACM
239views Hardware» more  ISPD 2005»
13 years 12 months ago
Mapping algorithm for large-scale field programmable analog array
Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. With thes...
I. Faik Baskaya, Sasank Reddy, Sung Kyu Lim, Tyson...
IPPS
2000
IEEE
13 years 10 months ago
Complexity Bounds for Lookup Table Implementation of Factored Forms in FPGA Technology Mapping
We consider technology mapping from factored form binary leaf-DAG to lookup tables LUTs, such as those found in eld programmable gate arrays. Polynomial time algorithms exist f...
Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi