75 search results - page 11 / 15 » Technology Mapping for FPGAs with Embedded Memory Blocks |
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IH
2005
Springer
15 years 3 months ago
2005
Springer
It is commonly believed that steganography within TCP/IP is easily achieved by embedding data in header fields seemingly filled with “random” data, such as the IP identifier...
ICCAD
2006
IEEE
15 years 7 months ago
2006
IEEE
Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...
CASES
2010
ACM
14 years 8 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
ISPD
2006
ACM
15 years 4 months ago
2006
ACM
Physical Design of modern systems on chip is extremely challenging. Such digital integrated circuits often contain tens of millions of logic gates, intellectual property blocks, e...
FPL
2006
Springer
15 years 1 months ago
2006
Springer
This paper is concerned with the application of formal optimisation methods to the design of mixed-granularity FPGAs. In particular, we investigate the appropriate mix and floorpl...