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» Technology Mapping for FPGAs with Embedded Memory Blocks
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DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
15 years 4 months ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
ICCAD
2007
IEEE
137views Hardware» more  ICCAD 2007»
15 years 7 months ago
Combining static and dynamic defect-tolerance techniques for nanoscale memory systems
Abstract— Nanoscale technology promises dramatically increased device density, but also decreased reliability. With bit error rates projected to be as high as 10%, designing a us...
Susmit Biswas, Gang Wang, Tzvetan S. Metodi, Ryan ...
RTAS
2006
IEEE
15 years 4 months ago
Memory Footprint Reduction with Quasi-Static Shared Libraries in MMU-less Embedded Systems
Despite a rapid decrease in the price of solid state memory devices, system memory is still a very precious resource in embedded systems. The use of shared libraries is known to b...
Jaesoo Lee, Jiyong Park, Seongsoo Hong
FPL
2007
Springer
146views Hardware» more  FPL 2007»
15 years 4 months ago
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
IH
1998
Springer
15 years 2 months ago
Fingerprinting Digital Circuits on Programmable Hardware
Advanced CAD tools and high-density VLSI technologies have combined to create a new market for reusable digital designs. The economic viability of the new core-based design paradig...
John Lach, William H. Mangione-Smith, Miodrag Potk...